Datasheet
Section 15 Serial Communication Interface (SCI) 
Rev. 6.00 Mar. 18, 2010 Page 617 of 982 
REJ09B0054-0600 
15.7.7  Serial Data Reception (Except for Block Transfer Mode) 
Data reception in Smart Card interface mode uses the same operation procedure as for normal 
serial communication interface mode. Figure 15.32 illustrates the retransfer operation when the 
SCI is in receive mode. 
1.  If an error is found when the received parity bit is checked, the PER bit in SSR is 
automatically set to 1. If the RIE bit in SCR is set at this time, an ERI interrupt request is 
generated. The PER bit in SSR should be kept cleared to 0 until the next parity bit is sampled. 
2.  The RDRF bit in SSR is not set for a frame in which an error has occurred. 
3.  If no error is found when the received parity bit is checked, the PER bit in SSR is not set to 1, 
the receive operation is judged to have been completed normally, and the RDRF flag in SSR is 
automatically set to 1. If the RIE bit in SCR is enabled at this time, an RXI interrupt request is 
generated. 
Figure 15.33 shows a flowchart for reception. A sequence of receive operations can be performed 
automatically by specifying the DTC to be activated using an RXI interrupt source. In a receive 
operation, an RXI interrupt request is generated when the RDRF flag in SSR is set to 1. If the RXI 
request is designated beforehand as a DTC activation source, the DTC will be activated by the 
RXI request, and the receive data will be transferred. At this moment, if DISEL in DTC is 0 with 
the transfer counter not being 0, the RDRF flag is automatically cleared. When DISEL is 1, or 
DISEL is 0 with the transfer counter being 0, the DTC transfers receive data but does not clear the 
flag. Therefore, the flag should be cleared by CPU. If an error occurs in receive mode and the 
ORER or PER flag is set to 1, a transfer error interrupt (ERI) request will be generated. Hence, so 
the error flag must be cleared to 0. In the event of an error, the DTC is not activated and receive 
data is skipped. Therefore, receive data is transferred for only the specified number of bytes in the 
event of an error. Even when a parity error occurs in receive mode and the PER flag is set to 1, the 
data that has been received is transferred to RDR and can be read from there. 
Note:  For details on receive operations in block transfer mode, refer to section 15.4, Operation in 
Asynchronous Mode. 
D0 D1 D2 D3 D4 D5 D6 D7 Dp DE Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp
(DE)
Ds D0 D1 D2 D3 D4Ds
Transfer
frame n+1st
Retransferred framenth transfer frame
RDRF
PER 
Figure 15.32 Retransfer Operation in SCI Receive Mode 










