Datasheet

Section 27 Electrical Characteristics
Rev. 6.00 Mar. 18, 2010 Page 919 of 982
REJ09B0054-0600
Condition A Conditions B, C
Test
Item Symbol Min Max Min Max Unit Conditions
Read data access time 2 t
ACC2
⎯ 1.5 × t
cyc
− 65
⎯ 1.5 × t
cyc
− 90
ns
Read data access time 3 t
ACC3
⎯ 2.0 × t
cyc
− 65
⎯ 2.0 × t
cyc
− 90
ns
Read data access time 4 t
ACC4
⎯ 2.5 × t
cyc
− 65
⎯ 2.5 × t
cyc
− 90
ns
Figures 27.14
to 27.18
Read data access time 5 t
ACC5
⎯ 3.0 × t
cyc
− 65
⎯ 3.0 × t
cyc
− 90
ns
WR delay time 1 t
WRD1
⎯ 50 ⎯ 90 ns
WR delay time 2 t
WRD2
⎯ 50 ⎯ 90 ns
WR pulse width 1 t
WSW1
1.0 × t
cyc
− 30
⎯ 1.0 × t
cyc
− 60
⎯ ns
WR pulse width 2 t
WSW2
1.5 × t
cyc
− 30
⎯ 1.5 × t
cyc
− 60
⎯ ns
Write data delay time t
WDD
⎯ 70 ⎯ 100 ns
Write data setup time t
WDS
0.5 × t
cyc
− 37
⎯ 0.5 × t
cyc
− 80
⎯ ns
Write data hold time t
WDH
0.5 × t
cyc
− 15
⎯ 0.5 × t
cyc
− 60
⎯ ns
WAIT setup time t
WTS
50 ⎯ 90 ⎯ ns
WAIT hold time t
WTH
10 ⎯ 10 ⎯ ns
Figure 27.16
BREQ setup time t
BRQS
50 ⎯ 90 ⎯ ns
BACK delay time t
BACD
⎯ 50 ⎯ 90 ns
Figure 27.19
Bus-floating time t
BZD
⎯ 80 ⎯ 160 ns