Datasheet

Section 17 A/D Converter
Rev. 6.00 Mar. 18, 2010 Page 705 of 982
REJ09B0054-0600
17.8.4 Range of Analog Power Supply and Other Pin Settings
If the conditions below are not met, the reliability of the device may be adversely affected.
• Analog input voltage range
The voltage applied to analog input pin ANn during A/D conversion should be in the range
AVss ≤ ANn ≤ AVcc.
• Relationship between AVcc, AVss and Vcc, Vss
Set AVss = Vss as the relationship between AVcc, AVss and Vcc, Vss. If the A/D converter is
not used, the AVcc and AVss pins must not be left open. In addition, AN0 and AN1 may be
used only when Vcc = AVcc in the case of the H8S/2239 Group, H8S/2227 Group,
H8S/2238R, and H8S/2236R.
• Vref range
The reference voltage input from the Vref pin should be set to AVcc or less.
17.8.5 Notes on Board Design
In board design, digital circuitry and analog circuitry should be as mutually isolated as possible,
and layout in which digital circuit signal lines and analog circuit signal lines cross or are in close
proximity should be avoided as far as possible. Failure to do so may result in incorrect operation
of the analog circuitry due to inductance, adversely affecting A/D conversion values. Also, digital
circuitry must be isolated from the analog input signals (AN0 to AN7), and analog power supply
(AVcc) by the analog ground (AVss). Also, the analog ground (AVss) should be connected at one
point to a stable digital ground (Vss) on the board.
17.8.6 Notes on Noise Countermeasures
A protection circuit should be connected in order to prevent damage due to abnormal voltage, such
as an excessive surge at the analog input pins (AN0 to AN7), between AVcc and AVss, as shown
in figure 17.10. Also, the bypass capacitors connected to AVcc and the filter capacitor connected
to AN0 to AN7 must be connected to AVss.
If a filter capacitor is connected, the input currents at the analog input pins (AN0 to AN7) are
averaged, and so an error may arise. Also, when A/D conversion is performed frequently, as in
scan mode, if the current charged and discharged by the capacitance of the sample-and-hold circuit
in the A/D converter exceeds the current input via the input impedance (R
in
), an error will arise in
the analog input pin voltage. Careful consideration is therefore required when deciding circuit
constants.