Datasheet

Section 15 Serial Communication Interface (SCI)
Rev. 6.00 Mar. 18, 2010 Page 572 of 982
REJ09B0054-0600
Table 15.3 shows sample N settings in BRR in normal asynchronous mode. Table 15.4 shows the
maximum bit rate for each frequency in normal asynchronous mode. Table 15.6 shows sample N
settings in BRR in clocked synchronous mode. Table 15.8 shows sample N settings in BRR in
Smart Card interface mode. In Smart Card interface mode, S (the number of base clock periods in
a 1-bit transfer interval) can be selected. For details, refer to section 15.7.4, Receive Data
Sampling Timing and Reception Margin. Tables 15.5 and 15.7 show the maximum bit rates with
external clock input.
When the ABCS bit in SEMR_0 of SCI_0 is set to 1 in asynchronous mode, the maximum bit rate
is twice the value shown in tables 15.4 and 15.5 (valid for H8S/2239 Group only).
Table 15.3 BRR Settings for Various Bit Rates (Asynchronous Mode)
Operating Frequency φ (MHz)
2
*
3
2.097152
*
3
2.4576
*
3
3
*
3
Bit Rate
(bps)
*
1
n N
Error
(%)
n N
Error
(%)
n N
Error
(%)
n N Error (%)
110 1 141 0.03 1 148 –0.04 1 174 –0.26 1 212 0.03
150 1 103 0.16 1 108 0.21 1 127 0.00 1 155 0.16
300 0 207 0.16 0 217 0.21 0 255 0.00 1 77 0.16
600 0 103 0.16 0 108 0.21 0 127 0.00 0 155 0.16
1200 0 51 0.16 0 54 –0.70 0 63 0.00 0 77 0.16
2400 0 25 0.16 0 26 1.14 0 31 0.00 0 38 0.16
4800 0 12 0.16 0 13 –2.48 0 15 0.00 0 19 –2.34
9600 — — — 0 6 –2.48 0 7 0.00 0 9 –2.34
19200 — — — — — — 0 3 0.00 0 4 –2.34
31250 0 1 0.00 — — — — — — 0 2 0.00
38400 — — — — — — 0 1 0.00 — — —