Datasheet

Section 11 16-Bit Timer Pulse Unit (TPU)
Rev. 6.00 Mar. 18, 2010 Page 414 of 982
REJ09B0054-0600
TCNT value
TGRA
H'0000
TIOCA
Time
TGRB
Counter cleared by
TGRA compare match
Figure 11.22 Example of PWM Mode Operation (1)
Figure 11.23 shows an example of PWM mode 2 operation.
In this example, synchronous operation is designated for channels 0 and 1, TGRB_1 compare
match is set as the TCNT clearing source, and 0 is set for the initial output value and 1 for the
output value of the other TGR registers (TGRA_0 to TGRD_0, TGRA_1), to output a 5-phase
PWM waveform.
In this case, the value set in TGRB_1 is used as the cycle, and the values set in the other TGRs as
the duty cycle.
TCNT value
TGRB_1
H'0000
TIOCA0
Counter cleared by
TGRB_1 compare match
Time
TGRA_1
TGRD_0
TGRC_0
TGRB_0
TGRA_0
TIOCB0
TIOCC0
TIOCD0
TIOCA1
Figure 11.23 Example of PWM Mode Operation (2)