Datasheet

Section 10 I/O Ports
Rev. 6.00 Mar. 18, 2010 Page 335 of 982
REJ09B0054-0600
PB7/A15/TIOCB5
The pin functions are switched as shown below according to the combination of operating
mode, the TPU channel 5
*
3
setting, AE3 to AE0 bits in PFCR, and the PB7DDR bit.
Operating
mode
Modes 4 to 6 Mode 7
AE3 to AE0 B'1xxx Other than B'1xxx
TPU channel 5
setting
*
1
*
3
Output Input or initial value Output Input or initial
value
PB7DDR 0 1 0 1
Pin functions A15
output
pin
TIOCB5
*
3
output pin
PB7
input pin
PB7
output
pin
TIOCB5
*
3
output pin
PB7
input
pin
PB7
output
pin
TIOCB5
*
3
input
pin
*
2
TIOCB5
*
3
input
pin
*
2
Notes: 1. For the setting of the TPU channel, see section 11, 16-Bit Timer Pulse Unit (TPU).
2. This pin functions as TIOCB5 input when TPU channel 5 timer operating mode is set to
normal operating or phase counting mode and IOB3 in TIOR_5 is set to 1.
3. Not available in the H8S/2227 Group.
PB6/A14/TIOCA5
The pin functions are switched as shown below according to the combination of operating
mode, the TPU channel 5
*
3
setting, AE3 to AE0 bits in PFCR, and the PB6DDR bit.
Operating
mode
Modes 4 to 6 Mode 7
AE3 to AE0 B'0111 or
B'1xxx
Other than (B'0111 or B'1xxx)
TPU channel 5
setting
*
1
*
3
Output Input or initial value Output Input or initial
value
PB6DDR 0 1 0 1
Pin functions A14
output pin
TIOCA5
*
3
output pin
PB6
input
pin
PB6
output
pin
TIOCA5
*
3
output pin
PB6
input
pin
PB6
output
pin
TIOCA5
*
3
input
pin
*
2
TIOCA5
*
3
input
pin
*
2
Notes: 1. For the setting of the TPU channel, see section 11, 16-Bit Timer Pulse Unit (TPU).
2. This pin functions as TIOCA5 input when TPU channel 5 timer operating mode is set to
normal operating or phase counting mode and IOA3 in TIOR_5 is set to 1.
3. Not available in the H8S/2227 Group.