Datasheet

Section 10 I/O Ports
Rev. 6.00 Mar. 18, 2010 Page 329 of 982
REJ09B0054-0600
10.6.3 Port A Register (PORTA)
PORTA shows the pin states. This register cannot be modified.
Bit Bit Name Initial Value R/W Description
7 to 4 — Undefined — Reserved
These bits are always read as undefined value.
3 PA3 —
*
R
2 PA2 —
*
R
1 PA1 —
*
R
If this bit is read while PADDR is set to 1, the PADR
value is read. If this bit is read while PADDR is
cleared, the PA3 pin states are read.
0 PA0 —
*
R
Note: * Determined by the states of PA3 to PA0 pins.
10.6.4 Port A Pull-Up MOS Control Register (PAPCR)
PAPCR controls the on/off state of port A input pull-up MOS.
Bit Bit Name Initial Value R/W Description
7 to 4 — Undefined — Reserved
These bits are always read as undefined value.
3 PA3PCR 0 R/W
2 PA2PCR 0 R/W
1 PA1PCR 0 R/W
0 PA0PCR 0 R/W
When the pin is specified as an input port, setting the
corresponding bit to 1 turns on the input pull-up MOS
for that pin.
10.6.5 Port A Open Drain Control Register (PAODR)
PAODR selects output state of port A.
Bit Bit Name Initial Value R/W Description
7 to 4 — Undefined — Reserved
These bits are always read as undefined value.
3 PAODR 0 R/W
2 PAODR 0 R/W
1 PAODR 0 R/W
When this bit is set to 1, the corresponding port A pin
functions as open drain output. When this bit is
cleared to 0, the corresponding pin functions as
CMOS output.
0 PAODR 0 R/W