Datasheet

Rev. 6.00 Mar. 18, 2010 Page xxii of lx
REJ09B0054-0600
2.7.7 Program-Counter Relative—@(d:8, PC) or @(d:16, PC)......................................92
2.7.8 Memory Indirect—@@aa:8 ..................................................................................93
2.7.9 Effective Address Calculation ...............................................................................94
2.8 Processing States.................................................................................................................96
2.9 Usage Notes........................................................................................................................98
2.9.1 TAS Instruction......................................................................................................98
2.9.2 STM/LDM Instruction...........................................................................................98
2.9.3 Bit Manipulation Instructions ................................................................................98
2.9.4 Access Methods for Registers with Write-Only Bits...........................................100
Section 3 MCU Operating Modes .....................................................................103
3.1 Operating Mode Selection ................................................................................................103
3.2 Register Descriptions........................................................................................................104
3.2.1 Mode Control Register (MDCR) .........................................................................104
3.2.2 System Control Register (SYSCR)......................................................................105
3.3 Operating Mode Descriptions...........................................................................................106
3.3.1 Mode 4.................................................................................................................106
3.3.2 Mode 5.................................................................................................................106
3.3.3 Mode 6.................................................................................................................107
3.3.4 Mode 7.................................................................................................................107
3.3.5 Pin Functions .......................................................................................................108
3.4 Memory Map in Each Operating Mode ............................................................................109
Section 4 Exception Handling...........................................................................119
4.1 Exception Handling Types and Priority............................................................................119
4.2 Exception Sources and Exception Vector Table...............................................................119
4.3 Reset..................................................................................................................................121
4.3.1 Reset Types..........................................................................................................121
4.3.2 Reset Exception Handling....................................................................................122
4.3.3 Interrupts after Reset............................................................................................123
4.3.4 State of On-Chip Peripheral Modules after Reset Release...................................123
4.4 Traces................................................................................................................................123
4.5 Interrupts...........................................................................................................................124
4.6 Trap Instruction.................................................................................................................124
4.7 Stack Status after Exception Handling..............................................................................125
4.8 Usage Note........................................................................................................................126
Section 5 Interrupt Controller............................................................................127
5.1 Features.............................................................................................................................127
5.2 Input/Output Pins..............................................................................................................129