Datasheet

Section 5 Interrupt Controller
Rev. 6.00 Mar. 18, 2010 Page 143 of 982
REJ09B0054-0600
Figure 5.4 shows the block diagram of the priority decision circuits.
I
Interrupt
acceptance
control
8-level
mask control
Default priority
determination
Vector number
Interrupt control mode 2
IPR
Interrupt source
I2 to I0
Interrupt
control
mode 0
Figure 5.4 Block Diagram of Interrupt Control Operation
Interrupt Acceptance Control: In interrupt control mode 0, interrupt acceptance is controlled by
the I bit in CCR.
Table 5.4 shows the interrupts selected in each interrupt control mode.
Table 5.4 Interrupts Selected in Each Interrupt Control Mode (1)
Interrupt Mask Bits
Interrupt Control Mode I Selected Interrupts
0 0 All interrupts
1 NMI interrupts
2 × All interrupts
Legend: ×: Don’t care
8-Level Control: In interrupt control mode 2, 8-level mask level determination is performed for
the selected interrupts in interrupt acceptance control according to the interrupt priority level
(IPR).