Datasheet

Section 27 Electrical Characteristics
Rev. 6.00 Mar. 18, 2010 Page 940 of 982
REJ09B0054-0600
(3) Bus Timing
Table 27.55 lists the bus timing.
Table 27.55 Bus Timing
Condition A (ZTAT version): V
CC
= 2.7 V to 3.6 V, AV
CC
= 2.7 V to 3.6 V,
V
ref
= 2.7 V to AV
CC
, V
SS
= AV
SS
= 0 V,
φ = 2 to 10 MHz,
T
a
= –20°C to +75°C (regular specifications),
T
a
= –40°C to +85°C (wide-range specifications)
Condition B (F-ZTAT version, masked ROM version):
V
CC
= 2.7 V to 3.6 V, AV
CC
= 2.7 V to 3.6 V,
V
ref
= 2.7 V to AV
CC
, V
SS
= AV
SS
= 0 V,
φ = 2 to 13.5MHz,
T
a
= –20°C to +75°C (regular specifications),
T
a
= –40°C to +85°C (wide-range specifications)
Condition C (Masked ROM version): V
CC
= 2.2 V to 3.6 V, AV
CC
= 2.2 V to 3.6 V,
V
ref
= 2.2 V to AV
CC
, V
SS
= AV
SS
= 0 V,
φ = 2 to 6.25 MHz,
T
a
= –20°C to +75°C (regular specifications),
T
a
= –40°C to +85°C (wide-range specifications)
Condition A
Condition B Condition C
Item Symbol Min Max Min Max Min Max Unit
Test
Conditions
Address delay
time
t
AD
⎯ 60 ⎯ 50 ⎯ 90 ns
Address setup
time
t
AS
0.5 × t
cyc
−
40
⎯ 0.5 × t
cyc
−
30
⎯ 0.5 × t
cyc
−
60
⎯ ns
Figures
27.14 to
27.18
Address hold
time
t
AH
0.5 × t
cyc
−
20
⎯ 0.5 × t
cyc
−
15
⎯ 0.5 × t
cyc
−
30
⎯ ns
CS delay time t
CSD
⎯ 60 ⎯ 50 ⎯ 90 ns
AS delay time t
ASD
⎯ 60 ⎯ 50 ⎯ 90 ns
RD delay time 1 t
RSD1
⎯ 60 ⎯ 50 ⎯ 90 ns
RD delay time 2 t
RSD2
⎯ 60 ⎯ 50 ⎯ 90 ns
Read data
setup time
t
RDS
30 ⎯ 30 ⎯ 50 ⎯ ns
Read data
hold time
t
RDH
0 ⎯ 0 ⎯ 0 ⎯ ns