Datasheet

Section 25 Electrical Characteristics (H8S/2215R)
Page 770 of 846 REJ09B0140-0900 Rev. 9.00
Sep 16, 2010
H8S/2215 Group
25.4.4 Timing of On-Chip Supporting Modules
Table 25.7 lists the timing of on-chip supporting modules.
Table 25.7 Timing of On-Chip Supporting Modules
Condition A: V
CC
= PLLV
CC
= DrV
CC
= 2.7 V to 3.6 V, AV
CC
= 2.7 V to 3.6 V, V
ref
= 2.7 V to AV
CC
,
V
SS
= PLLV
SS
= DrV
SS
= AV
SS
= 0 V, φ = 13 MHz to 16 MHz, T
a
= –20°C to +75°C
(regular specifications), T
a
= –40°C to +85°C (wide-range specifications)
Condition B: V
CC
= PLLV
CC
= DrV
CC
= 3.0 V to 3.6 V, AV
CC
= 3.0 V to 3.6 V, V
ref
= 3.0 V to AV
CC
,
V
SS
= PLLV
SS
= DrV
SS
= AV
SS
= 0 V, φ = 13 MHz to 24 MHz, T
a
= –20°C to +75°C
(regular specifications), T
a
= –40°C to +85°C (wide-range specifications)
Condition A Condition B
Item Symbol
Min. Max. Min. Max.
Unit
Test
Conditions
I/O port
Output data
delay time
t
PWD
— 60 — 40 ns Figure 25.12
Input data setup
time
t
PRS
50 — 30 —
Input data hold
time
t
PRH
50 — 30 —
TPU
Timer output
delay time
t
TOCD
— 60 — 40 ns Figure 25.13
Timer input
setup time
t
TICS
40 — 30 —
Timer clock input
setup time
t
TCKS
40 — 30 — ns Figure 25.14
Single
edge
t
TCKWH
1.5 — 1.5 — t
cyc
Timer
clock
pulse
width
Both
edges
t
TCKWL
2.5 — 2.5 —
TMR
Timer output
delay time
t
TMOD
— 60 — 41 ns Figure 25.15
Timer reset input
setup time
t
TMRS
50 — 29 — ns Figure 25.17
Timer clock input
setup time
t
TMCS
50 — 29 — ns Figure 25.16