Datasheet

Section 25 Electrical Characteristics (H8S/2215R)
REJ09B0140-0900 Rev. 9.00 Page 763 of 846
Sep 16, 2010
H8S/2215 Group
25.4.3 Bus Timing
Table 25.6 shows, Bus Timing.
Table 25.6 Bus Timing
Condition A: V
CC
= PLLV
CC
= DrV
CC
= 2.7 V to 3.6 V, AV
CC
= 2.7 V to 3.6 V, V
ref
= 2.7 V to AV
CC
,
V
SS
= PLLV
SS
= DrV
SS
= AV
SS
= 0 V, φ = 13 MHz to 16 MHz, T
a
= –20°C to +75°C
(regular specifications), T
a
= –40°C to +85°C (wide-range specifications)
Condition B: V
CC
= PLLV
CC
= DrV
CC
= 3.0 V to 3.6 V, AV
CC
= 3.0 V to 3.6 V, V
ref
= 3.0 V to AV
CC
,
V
SS
= PLLV
SS
= DrV
SS
= AV
SS
= 0 V, φ = 13 MHz to 24 MHz, T
a
= –20°C to +75°C
(regular specifications), T
a
= –40°C to +85°C (wide-range specifications)
Condition A Condition B
Item Symbol
Min. Max. Min. Max.
Unit Test Conditions
Address delay time t
AD
— 50 — 30 ns
Address setup time t
AS
0.5 × t
cyc
– 30
—
0.5 × t
cyc
– 20
— ns
Address hold time t
AH
0.5 × t
cyc
– 15
—
0.5 × t
cyc
– 8
— ns
Figures 25.7, 25.8,
25.10
CS delay time t
CSD
— 50 — 30 ns Figures 25.7, 25.8
AS delay time t
ASD
— 50 — 25 ns
Figures 25.7, 25.8,
25.10
RD delay time 1 t
RSD1
— 50 — 25 ns Figures 25.7, 25.8
RD delay time 2 t
RSD2
— 50 — 25 ns
Figures 25.7, 25.8,
25.10
Read data setup time t
RDS
30 — 20 — ns
Read data hold time t
RDH
0 — 0 — ns
Read data access time 2 t
ACC2
—
1.5 × t
cyc
– 65
—
1.5 × t
cyc
– 35
ns Figure 25.7
Read data access time 3 t
ACC3
—
2.0 × t
cyc
– 65
—
2.0 × t
cyc
– 40
ns Figures 25.7, 25.10
Read data access time 4 t
ACC4
—
2.5 × t
cyc
– 65
—
2.5 × t
cyc
– 35
ns Figure 25.8
Read data access time 5 t
ACC5
—
3.0 × t
cyc
– 65
—
3.0 × t
cyc
– 40
ns
WR delay time 1 t
WRD1
— 50 — 20 ns
WR delay time 2 t
WRD2
— 50 — 25 ns Figures 25.7, 25.8