Datasheet

Section 24 Electrical Characteristics (H8S/2215)
REJ09B0140-0900 Rev. 9.00 Page 731 of 846
Sep 16, 2010
H8S/2215 Group
24.4.1 Clock Timing
Table 24.4 lists the clock timing
Table 24.4 Clock Timing
Conditions: V
CC
= PLLV
CC
= DrV
CC
= 2.7 V to 3.6 V, AV
CC
= 2.7 V to 3.6 V, V
ref
= 2.7 V to AV
CC
,
V
SS
= PLLV
SS
= DrV
SS
= AV
SS
= 0 V, φ = 13 MHz to 16 MHz, T
a
= –20°C to +75°C
(regular specifications), T
a
= –40°C to +85°C (wide-range specifications)
Item Symbol Min. Max. Unit Test Conditions
Clock cycle time t
cyc
62.5 76.9 ns Figure 24.3
Clock high pulse width t
CH
20 — ns
Clock low pulse width t
CL
20 — ns
Clock rise time t
Cr
— 10 ns
Clock fall time t
Cf
— 10 ns
Oscillation stabilization time at
reset (crystal)
t
OSC1
20 — ms Figure 24.4
t
OSC2
8 — ms C
L1
= C
L2
= 10 pF
to 22 pF in figure
21.2
V
CC
= 2.7 V to
3.6 V in figure
22.3
Oscillation stabilization time in
software standby (crystal)
4 — ms C
L1
= C
L2
= 10 pF
to 15 pF in figure
21.2
V
CC
= 3.0 V to
3.6 V in figure
22.3
External clock output
stabilization delay time
t
DEXT
500 — µs Figure 24.4
USB operating clock (48 MHz)
stabilization time
t
OSC3
8 — ms V
CC
= 3.0 V to
3.6 V
USB operating clock (48 MHz)
oscillator frequency
f
48
48 MHz
USB operating clock (48 MHz)
cycle time
f
48
20.8 ns