Datasheet

Section 15 Universal Serial Bus Interface (USB)
REJ09B0140-0900 Rev. 9.00 Page 595 of 846
Sep 16, 2010
H8S/2215 Group
15.9.8 Reset
• A manual reset should not be performed during USB communication as the LSI will stop with
the USD+, USD- pin state maintained. This USB module uses synchronous reset for some
registers. The reset state of these registers must be cancelled after the clock oscillation
stabilization time has passed. At initialization, reset must be cancelled using the following
procedure:
1. Select the USB operating clock: Specify the UCKS3 to UCKS0 bits in UCTLR.
2. Cancel the USB module stop mode: Clear the MSTPB0 bit in MSTPCRB to 0.
3. Wait for the USB clock stabilization time: Wait until the CK48READY bit in UIFR3 is set
to 1.
4. Cancel the USB interface reset state: Clear the UIFRST bit in UCTLR to 0.
5. Cancel the UDC core reset state: Clear the UDCRST bit in UCTLR to 0.
For detail, see the flowcharts in section 15.5.1, Initialization, and section 15.5.2, USB Cable
Connection/Disconnection.
• The USB registers are not initialized when the watchdog timer (WDT) triggers a power-on
reset. Therefore, the USB may not operate properly after a power-on reset is triggered by the
WDT due to CPU runaway or a similar cause. (If a power-on reset is triggered by input of a
power-on reset signal from the RES pin, the USB registers are initialized and there is no
problem.) Consequently, an initialization routine should be used to write the initial values
listed below to the following three registers, thereby ensuring that all the USB registers are
properly initialized, immediately following a reset.
UCTLR = H'03, UIER3 = H'80, UIFR3 = H'00
15.9.9 EP0 Interrupt Assignment
EP0 interrupt sources assigned to bits 3 to 0 in UIFR0 must be assigned to the same interrupt sign
(EXIRQx) by setting UISR0. There are no other restrictions on EP0 interrupt sources.