Datasheet

Table Of Contents
Section 15 Universal Serial Bus Interface (USB)
Page 580 of 846 REJ09B0140-0900 Rev. 9.00
Sep 16, 2010
H8S/2215 Group
15.6.2 DMA Transfer by Auto-Request
(1) Overview
Burst mode transfer or ycle steal transfer can be selected for the on-chip DMAC auto-request
transfer. Endpoints that can be transferred by the on-chip DMAC are all registers (UEDR0s,
UEDR0i, UEDR0o, UEDR1i, UEDR2i, UEDR2o, UEDR3i, UEDR3o, UEDR4i, UEDR4o, and
UEDR5i). Confirm flags and interrupts corresponding to each data register before activating the
DMA. As UDMAR is not used in auto-request mode, set UDMAR to H'00.
(2) On-Chip DMAC Settings
The on-chip DMAC must be specified as follows: Auto-request, byte size, full-address mode
transfer, and number of transfers equal to or less than the maximum packet size of the data
register. After completing the DMAC transfers of specified time, the DMAC automatically stops.
(3) EPni DMA Transfer (n = 0 to 5)
(a) EPniPKTE Bits of UTRG (n = 0 to 5)
Note that 1 is not automatically written to EPniPKTE in case of auto-request transfer. Always
write 1 to EPniPKTE by the CPU. The following example shows when 150-byte data is
transmitted from EP2i to the host. In this case, 1 should be written to EP2iPKTE three times as
shown in figure 15.27.
(b) EP2i DMA Transfer Procedure
The DMAC transfer unit should be one packet. Therefore, set the number of transfers so that it is
equal to or less than the maximum packet size of each endpoint.
1. Confirm that UIFR1/EP2iEMPTY flag is 1.
2. DMAC settings for EP2i data transfer (such as auto-request and address setting).
3. Set the number of transfers for 64 bytes (the maximum packet size or less) in the DMAC.
4. Activate the DMAC (write 1 to DTE after reading DTE as 0).
5. DMA transfer.
6. Write 1 to the UTRG0/EP2iPKTE bit after the DMA transfer is completed.
7. Repeat steps 1 to 6 above.
8. Confirm that UIFR1/EP2iEMPTY flag is 1.
9. Set the number of transfer for 22 bytes in the DMAC.
10. Activate the DMAC (write 1 to DTE after reading DTE as 0).
11. DMA transfer.
12. Write 1 to the UTRG0/EP2iPKTE bit after the DMA transfer is completed.