Datasheet

Table Of Contents
Section 15 Universal Serial Bus Interface (USB)
Page 578 of 846 REJ09B0140-0900 Rev. 9.00
Sep 16, 2010
H8S/2215 Group
This kind of internal processing is performed when the currently selected data FIFO becomes full.
Accordingly, this processing is automatically performed only when 64-byte data is sent. This
processing is not performed automatically when data less than 64 bytes is sent.
(b) EP2i DMA Transfer Procedure
1. Set bits EP2iT1 and EP2iT0 in UDMAR.
2. DMAC settings (in DMAC specify number of transfers for 150 bytes).
3. Start DMAC.
4. DMA transfer.
5. Write 1 to EP2iPKTE in UTRG0 using DMA transfer end interrupt.
EP2iPKTE
(Automatically
performed)
EP2iPKTE
(Automatically
performed)
EP2iPKTE is
not performed
Execute by DMA transfer
end interrupt (user)
64 bytes 64 bytes 22 bytes
Figure 15.25 EP2iPKTE Operation in UTRG0
(4) EP2o and EP4o DMA Transfer
The EP2oT1 and EP4oT1 bits of UDMAR enable DMA transfer. The EP2oT0 and EP4oT0 bits of
the UDMAR specify the DREQ signal to be used by the DMA transfer. When the EP2oT1 or
EP4oT1 is set to 1, the DREQ signal is driven low if at least one of EP2o and EP4o data FIFOs are
full (ready state); the DREQ signal is driven high if both EP2o and EP4o data FIFOs are empty
when all receive data items are read.
(a) EP2oRDFN and EP4oRDFN Bits of UTRG
When DMA transfer is performed on EP2o and EP4o receive data, do not write 1 to EP2oRDFN
or EP4oRDFN after one data FIFO (64 bytes) has been read. In data transfer other than DMA
transfer, the next data cannot be read after one data FIFO (64 bytes) has been read unless
EP2oRDFN and EP4oRDFN are set to 1. While in DMA transfer, the USB module automatically
performs the same processing as writing 1 to EP2oRDFN and EP4oRDFN if the currently selected
FIFO becomes empty. Accordingly, in DMA transfer, the user need not write EP2oRDFN and
EP4oRDFN to 1. If the user writes EP2oRDFN and EP4oRDFN to 1 in DMA transfer, excess
transfer occurs and correct operation cannot be guaranteed.
Figure 15.26 shows an example of EP2o receiving 150 bytes of data from the host. In this case,
internal processing the same as writing 1 to EP2oRDFN is automatically performed three times.