Datasheet

Section 15 Universal Serial Bus Interface (USB)
Page 508 of 846 REJ09B0140-0900 Rev. 9.00
Sep 16, 2010
H8S/2215 Group
15.3.5 USB Trigger Register 0 (UTRG0)
UTRG0 generates one-shot triggers to the FIFO for each endpoint EP0 to EP2. For information on
accessing this register, see 2.9.4, Accessing Registers Containing Write-Only Bits.
Bit Bit Name Initial Value R/W Description
7, 6 — All 0 R Reserved
These bits are always read as 0 and cannot be
modified.
5 EP2oRDFN 0 W EP2o Read Completion
0: Performs no operation
1: Writes 1 to this bit after reading data for EP2o OUT
FIFO. EP2o FIFO has a dual FIFO configuration.
This trigger is generated to the currently effective
FIFO.
4 EP2iPKTE 0 W EP2i Packet Enable
0: Performs no operation
1: Generates a trigger to enable data transfer to the
EP2i IN FIFO. EP2i FIFO has a dual FIFO
configuration. This trigger is generated for the
currently effective FIFO.
3 EP1iPKTE 0 W EP1i Packet Enable
0: Performs no operation
1: Generates a trigger to enable data transfer to the
EP1i IN FIFO.
2 EP0oRDFN 0 W EP0o Read Completion
0: Performs no operation
1: Writes 1 to this bit after reading data for EP0o OUT
FIFO. This trigger enables the next packet to be
received.
1 EP0iPKTE 0 W EP0i Packet Enable
0: Performs no operation
1: Generates a trigger to enable data transfer to the
EP0i IN FIFO.