Datasheet

Table Of Contents
REJ09B0140-0900 Rev. 9.00 Page xli of liv
Sep 16, 2010
Figure 16.5 A/D Conversion Timing.......................................................................................... 611
Figure 16.6 External Trigger Input Timing ................................................................................ 612
Figure 16.7 A/D Conversion Precision Definitions (1) .............................................................. 614
Figure 16.8 A/D Conversion Precision Definitions (2) .............................................................. 614
Figure 16.9 Example of Analog Input Circuit ............................................................................ 615
Figure 16.10 Example of Analog Input Protection Circuit......................................................... 617
Figure 16.11 Analog Input Pin Equivalent Circuit ..................................................................... 617
Section 17 D/A Converter
Figure 17.1 Block Diagram of D/A Converter ........................................................................... 619
Figure 17.2 Example of D/A Converter Operation..................................................................... 622
Section 19 Flash Memory (F-ZTAT Version)
Figure 19.1 Block Diagram of Flash Memory............................................................................ 628
Figure 19.2 Flash Memory State Transitions.............................................................................. 629
Figure 19.3 Boot Mode (Sample) ............................................................................................... 631
Figure 19.4 User Program Mode (Sample)................................................................................. 632
Figure 19.5 Flash Memory Block Configuration........................................................................ 633
Figure 19.6 System Configuration in SCI Boot Mode................................................................ 642
Figure 19.7 System Configuration Diagram when Using USB Boot Mode ............................... 646
Figure 19.8 Programming/Erasing Flowchart Example in User Program Mode........................ 649
Figure 19.9 Flowchart for Flash Memory Emulation in RAM................................................... 650
Figure 19.10 Example of RAM Overlap Operation.................................................................... 651
Figure 19.11 Program/Program-Verify Flowchart......................................................................653
Figure 19.12 Erase/Erase-Verify Flowchart ............................................................................... 655
Figure 19.13 Memory Map in Programmer Mode...................................................................... 658
Figure 19.14 Power-On/Off Timing (Boot Mode)......................................................................661
Figure 19.15 Power-On/Off Timing (User Program Mode)....................................................... 662
Figure 19.16 Mode Transition Timing
(Example: Boot Mode User Mode User Program Mode) ........................... 663
Section 20 Masked ROM
Figure 20.1 Block Diagram of On-Chip Masked ROM (256 kbytes)........................................ 665
Section 21 Clock Pulse Generator
Figure 21.1 Block Diagram of Clock Pulse Generator ............................................................... 667
Figure 21.2 Connection of Crystal Resonator (Example)........................................................... 671
Figure 21.3 Crystal Resonator Equivalent Circuit...................................................................... 672
Figure 21.4 Example Wiring Diagram for Connecting a Ceramic Resonator ............................ 672
Figure 21.5 External Clock Input (Examples)............................................................................ 673