Datasheet

REJ09B0140-0900 Rev. 9.00 Page xxxvii of liv
Sep 16, 2010
Figure 10.39 TGI Interrupt Timing (Input Capture)................................................................... 339
Figure 10.40 TCIV Interrupt Setting Timing.............................................................................. 340
Figure 10.41 TCIU Interrupt Setting Timing.............................................................................. 340
Figure 10.42 Timing for Status Flag Clearing by CPU .............................................................. 341
Figure 10.43 Timing for Status Flag Clearing by DTC or DMAC Activation ........................... 341
Figure 10.44 Phase Difference, Overlap, and Pulse Width in Phase Counting Mode................ 342
Figure 10.45 Contention between TCNT Write and Clear Operations....................................... 343
Figure 10.46 Contention between TCNT Write and Increment Operations ............................... 343
Figure 10.47 Contention between TGR Write and Compare Match........................................... 344
Figure 10.48 Contention between Buffer Register Write and Compare Match.......................... 345
Figure 10.49 Contention between TGR Read and Input Capture............................................... 345
Figure 10.50 Contention between TGR Write and Input Capture .............................................. 346
Figure 10.51 Contention between Buffer Register Write and Input Capture.............................. 347
Figure 10.52 Contention between Overflow and Counter Clearing............................................347
Figure 10.53 Contention between TCNT Write and Overflow................................................... 348
Section 11 8-Bit Timers (TMR)
Figure 11.1 Block Diagram of 8-Bit Timer ................................................................................350
Figure 11.2 Example of Pulse Output......................................................................................... 356
Figure 11.3 Count Timing for Internal Clock Input....................................................................357
Figure 11.4 Count Timing for External Clock Input .................................................................. 357
Figure 11.5 Timing of CMF Setting ........................................................................................... 358
Figure 11.6 Timing of Timer Output.......................................................................................... 358
Figure 11.7 Timing of Compare Match Clear.............................................................................359
Figure 11.8 Timing of Clearance by External Reset................................................................... 359
Figure 11.9 Timing of OVF Setting............................................................................................360
Figure 11.10 Contention between TCNT Write and Clear ......................................................... 363
Figure 11.11 Contention between TCNT Write and Increment.................................................. 364
Figure 11.12 Contention between TCOR Write and Compare Match........................................ 365
Section 12 Watchdog Timer (WDT)
Figure 12.1 Block Diagram of WDT..........................................................................................369
Figure 12.2 Operation in Watchdog Timer Mode.......................................................................373
Figure 12.3 Timing of WOVF Setting........................................................................................ 374
Figure 12.4 Operation in Interval Timer Mode........................................................................... 375
Figure 12.5 Timing of OVF Setting............................................................................................375
Figure 12.6 Format of Data Written to TCNT and TCSR .......................................................... 376
Figure 12.7 Format of Data Written to RSTCSR (Example of WDT0)......................................377
Figure 12.8 Contention between TCNT Write and Increment.................................................... 378