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ManualsBrandsRENESAS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller TQFP 120 (14x14) 16-Bit 24 MHz I/O number 68
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Table Of Contents
Page xxxvi of liv REJ09B0140-0900 Rev. 9.00
Sep 16, 2010
Section 10 16-Bit Timer Pulse Unit (TPU)
Figure 10.1 Block Diagram of TPU............................................................................................ 284
Figure 10.2 16-Bit Register Access Operation [Bus Master ↔ TCNT (16 Bits)]...................... 311
Figure 10.3 8-Bit Register Access Operation [Bus Master ↔ TCR (Upper 8 Bits)].................. 312
Figure 10.4 8-Bit Register Access Operation [Bus Master ↔ TMDR (Lower 8 Bits)] ............. 312
Figure 10.5 8-Bit Register Access Operation [Bus Master ↔ TCR and TMDR (16 Bits)] ....... 312
Figure 10.6 Example of Counter Operation Setting Procedure .................................................. 313
Figure 10.7 Free-Running Counter Operation............................................................................ 314
Figure 10.8 Periodic Counter Operation..................................................................................... 315
Figure 10.9 Example of Setting Procedure for Waveform Output by Compare Match.............. 315
Figure 10.10 Example of 0 Output/1 Output Operation ............................................................. 316
Figure 10.11 Example of Toggle Output Operation................................................................... 316
Figure 10.12 Example of Input Capture Operation Setting Procedure ....................................... 317
Figure 10.13 Example of Input Capture Operation .................................................................... 318
Figure 10.14 Example of Synchronous Operation Setting Procedure ........................................ 319
Figure 10.15 Example of Synchronous Operation...................................................................... 320
Figure 10.16 Compare Match Buffer Operation......................................................................... 321
Figure 10.17 Input Capture Buffer Operation............................................................................. 321
Figure 10.18 Example of Buffer Operation Setting Procedure................................................... 321
Figure 10.19 Example of Buffer Operation (1) .......................................................................... 322
Figure 10.20 Example of Buffer Operation (2) .......................................................................... 323
Figure 10.21 Example of PWM Mode Setting Procedure.......................................................... 325
Figure 10.22 Example of PWM Mode Operation (1)................................................................. 325
Figure 10.23 Example of PWM Mode Operation (2)................................................................. 326
Figure 10.24 Example of PWM Mode Operation (3)................................................................. 327
Figure 10.25 Example of Phase Counting Mode Setting Procedure........................................... 328
Figure 10.26 Example of Phase Counting Mode 1 Operation .................................................... 329
Figure 10.27 Example of Phase Counting Mode 2 Operation .................................................... 330
Figure 10.28 Example of Phase Counting Mode 3 Operation .................................................... 331
Figure 10.29 Example of Phase Counting Mode 4 Operation .................................................... 332
Figure 10.30 Count Timing in Internal Clock Operation............................................................ 335
Figure 10.31 Count Timing in External Clock Operation .......................................................... 335
Figure 10.32 Output Compare Output Timing ........................................................................... 336
Figure 10.33 Input Capture Input Signal Timing........................................................................ 336
Figure 10.34 Counter Clear Timing (Compare Match) .............................................................. 337
Figure 10.35 Counter Clear Timing (Input Capture).................................................................. 337
Figure 10.36 Buffer Operation Timing (Compare Match) ......................................................... 338
Figure 10.37 Buffer Operation Timing (Input Capture) ............................................................. 338
Figure 10.38 TGI Interrupt Timing (Compare Match) ............................................................... 339