Datasheet

Section 4 Exception Handling
REJ09B0140-0900 Rev. 9.00 Page 75 of 846
Sep 16, 2010
H8S/2215 Group
4.3 Reset
A reset has the highest exception priority.
When the RES or MRES pin goes low, all processing halts and this LSI enters the reset state. To
ensure that this LSI is reset, hold the RES pin low for at least 20 ms at power-on.
A reset initializes the internal state of the CPU and the registers of on-chip peripheral modules.
This LSI can also be reset by overflow of the watchdog timer. For details, see section 12,
Watchdog Timer (WDT).
Immediately after a reset, interrupt control mode 0 is set.
Note: TRST should be brought low level at power-on. For details, see section 14, Boundary
Scan Function.
4.3.1 Reset Types
A reset can be of either of two types: a power-on reset or a manual reset. Reset types are shown in
table 4.3. A power-on reset should be used when powering on.
The internal state of the CPU is initialized by either type of reset. A power-on reset also initializes
all the registers in the on-chip peripheral modules, while a manual reset initializes all the registers
in the on-chip peripheral modules except for the bus controller and I/O ports, which retain their
previous states.
With a manual reset, since the on-chip peripheral modules are initialized, ports used as on-chip
peripheral module I/O pins are switched to I/O ports controlled by DDR and DR.
Table 4.3 Reset Types
Reset Transition
Condition
Internal State
Type MRES RES CPU On-Chip Peripheral Modules
Power-on reset × Low Initialized Initialized
Manual reset Low High Initialized Initialized, except for bus controller and I/O
ports
Legend:
×: Don’t care