Datasheet

Section 24 Electrical Characteristics (H8S/2215)
REJ09B0140-0900 Rev. 9.00 Page 741 of 846
Sep 16, 2010
H8S/2215 Group
24.4.4 Timing of On-Chip Supporting Modules
Table 24.7 lists the timing of on-chip supporting modules.
Table 24.7 Timing of On-Chip Supporting Modules
Conditions: V
CC
= PLLV
CC
= DrV
CC
=2.7 V to 3.6 V, AV
CC
= 2.7 V to 3.6 V, V
ref
= 2.7 V to AV
CC
,
V
SS
= PLLV
SS
= DrV
SS
= AV
SS
= 0 V, φ = 13 MHz to 16 MHz, T
a
= –20°C to +75°C
(regular specifications), T
a
= –40°C to +85°C (wide-range specifications)
Item Symbol Min. Max. Unit Test Conditions
I/O port Output data delay
time
t
PWD
— 60 ns Figure 24.12
Input data setup time t
PRS
50 —
Input data hold time t
PRH
50 —
TPU Timer output delay
time
t
TOCD
— 60 ns Figure 24.13
Timer input setup
time
t
TICS
40 —
Timer clock input
setup time
t
TCKS
40 — ns Figure 24.14
Single
edge
t
TCKWH
1.5 — t
cyc
Timer
clock
pulse
width
Both
edges
t
TCKWL
2.5 —
TMR Timer output delay
time
t
TMOD
— 60 ns Figure 24.15
Timer reset input
setup time
t
TMRS
50 — ns Figure 24.17
Timer clock input
setup time
t
TMCS
50 — ns Figure 24.16
Single
edge
t
TMCWH
1.5 — t
cyc
Timer
clock
pulse
width
Both
edges
t
TMCWL
2.5 —