Datasheet

Section 15 Universal Serial Bus Interface (USB)
REJ09B0140-0900 Rev. 9.00 Page 503 of 846
Sep 16, 2010
H8S/2215 Group
Bit Bit Name Initial Value R/W Description
5
4
3
2
UCKS3
UCKS2
UCKS1
UCKS0
0
0
0
0
R/W
R/W
R/W
R/W
USB Operating Clock Selection 3 to 0
Select the USB operating clock (48 MHz). When
UCKS0 to UCKS3 are 0000, both the 48-MHz
oscillator and internal PLL circuit stop and USB
operating clock must be selected according to the
clock source.
The internal PLL circuit and 48-MHz oscillator start
operating after USB module stop mode has been
cancelled. In addition, the USB operating clock is
supplied to the UDC core after 48-MHz clock
stabilization time has been passed. The USB clock
stabilization wait time completion can be detected by
the CK48READY flag of UIFR3.
UCKS0 to UCKS3 muse be written during USB
module stop mode.
0000: USB operating clock stops
(Both 48-MHz oscillator and PLL stop)
0001: Reserved
0010 (H8S/2215): Reserved
0010 (H8S/2215R, H8S/2215T and H8S/2215C): Uses
a clock (48 MHz) generated by doubling the 24-
MHz system clock by the PLL circuit. The 48-
MHz oscillator stops. The USB operating clock
stabilization time is 2 ms.
0011: Uses a clock (48 MHz) generated by tripling the
16-MHz external clock (EXTAL pin input) by the
PLL circuit
.
0100: Reserved
0101: Reserved
0110 (H8S/2215): Reserved
0110 (H8S/2215R, H8S/2215T and H8S/2215C): Uses
a clock (48 MHz) generated by doubling the 24-
MHz system clock by the PLL circuit. The 48-
MHz oscillator stops. The USB operating clock
stabilization time is 8 ms.
0111: Uses a clock (48 MHz) generated by tripling the
16-MHz crystal oscillator (system clock pulse
generator) by the PLL circuit
.