Datasheet

Section 9 I/O Ports
Page 254 of 846 REJ09B0140-0900 Rev. 9.00
Sep 16, 2010
H8S/2215 Group
9.7.1 Port B Data Direction Register (PBDDR)
The individual bits of PBDDR specify input or output for the pins of port B. Since this is a write-
only register, bit manipulation instructions should not be used to write to it. For details, see section
2.9.4, Accessing Registers Containing Write-Only Bits.
Bit Bit Name Initial Value R/W Description
7 PB7DDR 0 W
6 PB6DDR 0 W
5 PB5DDR 0 W
4 PB4DDR 0 W
3 PB3DDR 0 W
2 PB2DDR 0 W
1 PB1DDR 0 W
0 PB0DDR 0 W
Modes 4 to 6
If address output is enabled by the setting of bits AE3 to
AE0 in PFCR, the corresponding port B pins are address
outputs. When address output is disabled, setting a
PBDDR bit to 1 makes the corresponding port B pin an
output port, while clearing the bit to 0 makes the pin an
input port.
Mode 7
Setting a PBDDR bit to 1 makes the corresponding port B
pin an output port, while clearing the bit to 0 makes the
pin an input port.
9.7.2 Port B Data Register (PBDR)
PBDR stores output data for the port B pins.
Bit Bit Name Initial Value R/W Description
7 PB7DR 0 R/W
6 PB6DR 0 R/W
5 PB5DR 0 R/W
4 PB4DR 0 R/W
3 PB3DR 0 R/W
2 PB2DR 0 R/W
1 PB1DR 0 R/W
An output data for a pin is stored when the pin function is
specified to a general purpose output port.
0 PB0DR 0 R/W