Datasheet

Appendix
Rev.7.00 Dec. 24, 2008 Page 685 of 698
REJ09B0074-0700
Appendix
A. I/O Port States in Each Processing State
Port Name
Pin Name
MCU
Operating
Mode
Power-on
Reset
Manual
Reset
Hardware
Standby
Mode
Software
Standby
Mode or
Watch Mode
Bus Right
Release
State
Program
Execution State
or Sleep Mode
P17 to P14 4 to 7 T keep T keep keep I/O port
P13/A23
P12/A22
P11/A21
7 T keep T keep keep I/O port
Address output
selected by AEn
bit
4 to 6 T keep T [OPE=0]
T
[OPE=1]
keep
T Address output
Port selection 4 to 6 T keep T keep keep I/O port
P10/A20 7 T keep T keep keep I/O port
4 and 5
L
Address output
selected by AEn
bit
6 T
keep T [OPE=0]
T
[OPE=1]
keep
T Address output
Port selection 4 to 6 T*
1
keep T keep keep I/O port
Port 3 4 to 7 T keep T keep keep I/O port
Port 4 4 to 7 T T T T T Input port
P77 to P75*
3
7 T keep T keep keep I/O port
P74*
2
4 to 7 T keep T keep keep I/O port
7 T keep T keep keep I/O port P71/CS5*
2
P70/CS4*
2
4 to 6 T keep T [DDR•OPE=0]
T
[DDR•OPE=1]
H
T
[DDR=0]
Input port
[DDR=1]
CS5, CS4
Port 9 4 to 7 T T T [DAOEn=1]
keep
[DAOEn=0]
T
keep Input port