Datasheet

Section 22 Electrical Characteristics
Rev.7.00 Dec. 24, 2008 Page 669 of 698
REJ09B0074-0700
Condition A Condition B Condition C, D Test
Item Symbol Min. Max. Min. Max. Min. Max. Unit Conditions
Read data access
time 3
t
ACC3
— 2.0 × t
cyc
– 90
— 2.0 × t
cyc
– 65
— 2.0 × t
cyc
– 40
ns Figures 22.7,
22.10
Read data access
time 4
t
ACC4
— 2.5 × t
cyc
– 90
— 2.5 × t
cyc
– 65
— 2.5 × t
cyc
– 35
ns
Read data access
time 5
t
ACC5
— 3.0 × t
cyc
– 90
— 3.0 × t
cyc
– 65
— 3.0 × t
cyc
– 40
ns
Figure 22.8
WR delay time 1 t
WRD1
— 90 — 50 — 20 ns Figure 22.8
WR delay time 2 t
WRD2
— 90 — 50 — 25 ns Figures 22.7,
22.8
WR pulse width 1 t
WSW1
1.0 × t
cyc
– 60
— 1.0 × t
cyc
– 30
— 1.0 × t
cyc
– 20
— ns Figure 22.7
WR pulse width 2 t
WSW2
1.5 × t
cyc
– 60
— 1.5 × t
cyc
– 30
— 1.5 × t
cyc
– 20
— ns Figure 22.8
Write data delay time t
WDD
— 100 — 50 — 30 ns Figures 22.7,
22.8
Write data setup time t
WDS
0.5 × t
cyc
– 80
— 0.5 × t
cyc
– 30
— 0.5 × t
cyc
– 20
— ns Figure 22.8
Write data hold time t
WDH
0.5 × t
cyc
– 60
— 0.5 × t
cyc
– 15
— 0.5 × t
cyc
– 10
— ns Figures 22.7,
22.8
WAIT setup time t
WTS
90 — 50 — 25 — ns
WAIT hold time t
WTH
10 — 10 — 5 — ns
Figure 22.9
BREQ setup time t
BRQS
90 — 50 — 25 — ns Figure 22.11
BACK delay time t
BACD
— 90 — 50 — 35 ns
Bus-floating time t
BZD
— 160 — 80 — 50 ns