Datasheet

Section 15 A/D Converter
Rev.7.00 Dec. 24, 2008 Page 546 of 698
REJ09B0074-0700
15.6 Interrupts
The A/D converter generates an A/D conversion end interrupt (ADI) at the end of A/D conversion.
Setting the ADIE bit to 1 enables ADI interrupt requests while the bit ADF in ADCSR is set to 1
after A/D conversion is completed. The DMAC can be activated by an ADI interrupt.
Table 15.5 A/D Converter Interrupt Source
Name Interrupt Source Interrupt Source Flag DMAC Activation
ADI A/D conversion completed ADF Possible
15.7 A/D Conversion Precision Definitions
This LSI’s A/D conversion precision definitions are given below.
• Resolution
The number of A/D converter digital output codes
• Quantization error
The deviation inherent in the A/D converter, given by 1/2 LSB (see figure 15.7).
• Offset error
The deviation of the analog input voltage value from the ideal A/D conversion characteristic
when the digital output changes from the minimum voltage value B'0000000000 (H'000) to
B'0000000001 (H'001) (see figure 15.8).
• Full-scale error
The deviation of the analog input voltage value from the ideal A/D conversion characteristic
when the digital output changes from B'1111111110 (H'3FE) to B'1111111111 (H'3FF) (see
figure 15.8).
• Nonlinearity error
The error with respect to the ideal A/D conversion characteristic between zero voltage and full-
scale voltage. Does not include offset error, full-scale error, or quantization error (see figure
15.8).
• Absolute precision
The deviation between the digital value and the analog input value. Includes offset error, full-
scale error, quantization error, and nonlinearity error.