Datasheet

Section 9 16-Bit Timer Pulse Unit (TPU)
Rev.7.00 Dec. 24, 2008 Page 295 of 698
REJ09B0074-0700
Bit Bit Name Initial value R/W Description
4 TCFV 0 R/(W)* Overflow Flag
Status flag that indicates that TCNT overflow has
occurred. The write value should always be 0 to clear this
flag.
[Setting condition]
When the TCNT value overflows (change from H'FFFF
to H'0000)
[Clearing condition]
When 0 is written to TCFV after reading TCFV = 1
3 TGFD 0 R/(W)* Input Capture/Output Compare Flag D
Status flag that indicates the occurrence of TGRD input
capture or compare match in channel 0. The write value
should always be 0 to clear this flag. In channels 1 and 2,
bit 3 is reserved. It is always read as 0 and cannot be
modified.
[Setting conditions]
• When TCNT = TGRD while TGRD is functioning as
output compare register
• When TCNT value is transferred to TGRD by input
capture signal while TGRD is functioning as input
capture register
[Clearing condition]
When 0 is written to TGFD after reading TGFD = 1
2 TGFC 0 R/(W)* Input Capture/Output Compare Flag C
Status flag that indicates the occurrence of TGRC input
capture or compare match in channel 0. The write value
should always be 0 to clear this flag. In channels 1 and 2,
bit 2 is reserved. It is always read as 0 and cannot be
modified.
[Setting conditions]
• When TCNT = TGRC while TGRC is functioning as
output compare register
• When TCNT value is transferred to TGRC by input
capture signal while TGRC is functioning as input
capture register
[Clearing condition]
When 0 is written to TGFC after reading TGFC = 1