Datasheet

Section 2 CPU
Rev.7.00 Dec. 24, 2008 Page 55 of 698
REJ09B0074-0700
Table 2.9 System Control Instruction
Instruction Size* Function
TRAPA – Starts trap-instruction exception handling.
RTE – Returns from an exception-handling routine.
SLEEP – Causes a transition to a power-down state.
LDC B/W (EAs) → CCR, (EAs) → EXR
Moves the source operand contents or immediate data to CCR or EXR.
Although CCR and EXR are 8-bit registers, word-size transfers are
performed between them and memory. The upper 8 bits are valid.
STC B/W CCR → (EAd), EXR → (EAd)
Transfers CCR or EXR contents to a general register or memory.
Although CCR and EXR are 8-bit registers, word-size transfers are
performed between them and memory. The upper 8 bits are valid.
ANDC B CCR ∧ #IMM → CCR, EXR ∧ #IMM → EXR
Logically ANDs the CCR or EXR contents with immediate data.
ORC B CCR ∨ #IMM → CCR, EXR ∨ #IMM → EXR
Logically ORs the CCR or EXR contents with immediate data.
XORC B CCR ⊕ #IMM → CCR, EXR ⊕ #IMM → EXR
Logically exclusive-ORs the CCR or EXR contents with immediate data.
NOP – PC + 2 → PC
Only increments the program counter.
Note:* Size refers to the operand size.
B: Byte
W: Word