Datasheet

Section 1 Overview
Rev.7.00 Dec. 24, 2008 Page 22 of 698
REJ09B0074-0700
Pin No.
Type Symbol
TFP-100G,
TFP-100GV
BP-112,
BP-112V
FP-64E,
FP-64EV,
TNP-64B,
TNP-64BV
I/O Function
RES* 58 G8 36 Input Reset pin. When this pin is driven
low, the chip is reset.
STBY* 57 H11 35 Input When this pin is driven low, a
transition is made to hardware
standby mode.
MRES 55 H9 ⎯ Input When this pin is driven low, a
transition is made to manual reset
mode. (Supported only by the
H8S/2218 Group)
BREQ 97 B4 ⎯ Input Used by an external bus master to
issue a bus request to this LSI
(Supported only by the H8S/2218
Group)
BACK 96 D5 ⎯ Output Indicates that the bus has been
released to an external bus master.
(Supported only by the H8S/2218
Group)
FWE 80 A9 49 Input Pin for use by flash memory. This
pin is only used in the flash memory
version. In the masked ROM
version, it should be connected to
the system power supply (0 V).
System
control
EMLE 82 B8 51 Input Emulator enable
When E10A is not used, connect
this pin to the system power supply
(0 V). When E10A is used, this pin
should be fixed high.
Interrupts NMI* 81 C8 50 Input Nonmaskable interrupt pin. If this
pin is not used, it should be fixed
high.
IRQ7
IRQ4
IRQ3
IRQ2
IRQ1
IRQ0
25
24
94
97
8
6
J2
H3
C5
B4
D1
D3
16
15
60
61
7
5
Input These pins request a maskable
interrupt.