Datasheet

Section 20 Power-Down Modes
Rev.7.00 Dec. 24, 2008 Page 615 of 698
REJ09B0074-0700
MSTPCRC
Bit Bit Name Initial Value R/W Module
7 MSTPC7* 1 R/W ⎯
6 MSTPC6* 1 R/W ⎯
5 MSTPC5* 1 R/W ⎯
4 MSTPC4* 1 R/W ⎯
3 MSTPC3* 1 R/W ⎯
2 MSTPC2* 1 R/W ⎯
1 MSTPC1 0 R/W Flash Memory (This bit is reserved in the masked
ROM version; setting is disabled.)
Note: Setting of the flash memory module stop
mode should be carried out while the
programs in the on-chip RAM and external
memory are executed. If the flash memory is
stopped with the programming in the flash
memory, the program after setting module
stop mode stops and enters to the deadlock
state.
Figure 20.2 shows the example of using
module stop mode.
0 MSTPC0* 1 R/W ⎯
Note: * MSTPA6 are readable/writable bits with an initial value of 0 and should always be written
with 1.
MSTPA4 to MSTPA2, MSTPA0, MSTPB6, MSTPB4 to MSTPB1, MSTPC7 to MSTPC2,
MSTPC0 are readable/writable bits with an initial value of 1 and should always be written
with 1.