Datasheet

Section 20 Power-Down Modes
Rev.7.00 Dec. 24, 2008 Page 612 of 698
REJ09B0074-0700
Bit Bit Name Initial Value R/W Description
6
5
4
STS2
STS1
STS0
0
0
0
R/W
R/W
R/W
Standby Timer Select 2 to 0
These bits select the MCU wait time for clock
stabilization when cancel software standby mode, watch
mode, or subactive mode by an external interrupt. With
a crystal oscillator (tables 20.3 and 20.4), select a wait
time of t
OSC2
ms (oscillation stabilization time) or more,
depending on the operating frequency. With an external
clock, there are no specific wait requirements. However,
in the F-ZTAT version a standby time of 16 wait states
cannot be used with an external clock. In this case,
select a wait time of 100 μs or more.
000: Standby time = 8192 states
001: Standby time = 16384 states
010: Standby time = 32768 states
011: Standby time = 65536 states
100: Standby time = 131072 states
101: Standby time = 262144 states
110: Standby time = 2048 states
111: Standby time = 16 states
3 OPE 1 R/W Output Port Enable
This bit selects whether address bus and bus control
signals (CS0 to CS7, AS, RD, HWR, and LWR) are
brought to high impedance state or retained in software
standby mode, watch mode, or direct transition.
0: High impedance state
1: Retained
2 to 0 — All 0 — Reserved
These bits are always read as 0, and cannot be
modified.