Datasheet
Section 1 Overview
Rev.7.00 Dec. 24, 2008 Page 7 of 698
REJ09B0074-0700
1.3 Pin Arrangements
The pin arrangements of the HD64F2218, HD64F2218U, HD64F2218CU and HD64F2217CU are
shown in figures 1.5 and 1.6. The pin arrangements of the HD6432217 are shown in figures 1.7
and 1.8. The pin arrangements of the HD64F2212, HD64F2212U, HD64F2212CU, HD64F2211,
HD64F2211U, HD64F2211CU and HD64F2210CU are shown in figures 1.9 and 1.11. The pin
arrangements of the HD6432211, HD6432210 and HD6432210S is shown in figures 1.10 and
1.12.
TFP-100G
TFP-100GV
(Top View)
PD4/D12
PD5/D13
PD6/D14
PD7/D15
FWE
NMI
EMLE*
TDO*
TCK*
TMS*
TRST*
TDI*
VCC
PF7/φ
VSS
PF6/AS
PF5/RD
PF4/HWR
PF3/LWR/ADTRG/IRQ3
PF2/WAIT
PF1/BACK
PF0/BREQ/IRQ2
PA3/A19/SCK2
PA2/A18/RxD2
PA1/A17/TxD2
PB5/A13
PB4/A12
PLLVCC
UBPM
PLLVSS
P40/AN0
P41/AN1
P42/AN2
P43/AN3
Vref
PB3/A11
PB2/A10
PB1/A9
PB0/A8
P96/AN14
P97/AN15
DrVSS
USD-
USD+
DrVCC
P36(PUPD+)
VBUS
PG4/CS0
PG3/CS1
PG2/CS2
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
PA0/A16
P10/TIOCA0/A20
P11/TIOCB0/A21
P12/TIOCC0/TCLKA/A22
P13/TIOCD0/TCLKB/A23
P14/TIOCA1/IRQ0
P15/TIOCB1/TCLKC
P16/TIOCA2/IRQ1
P17/TIOCB2/TCLKD
PC0/A0
PC1/A1
PC2/A2
PC3/A3
MD0
MD1
MD2
PC4/A4
PC5/A5
PC6/A6
PC7/A7
USPND/TMOW
P30/TxD0
P31/RxD0
P32/SCK0/IRQ4
PG1/CS3/IRQ7
PD3/D11
PD2/D10
PD1/D9
PD0/D8
PE7/D7
PE6/D6
PE5/D5
PE4/D4
PE3/D3
PE2/D2
PE1/D1
PE0/D0
P70/CS4
VCC
EXTAL
XTAL
VSS
RES
STBY
P71/CS5
P74/MRE
S
OSC1
OSC2
PB7/A15
PB6/A14
Note: * When EMLE = 0, boundary scan is available and the pins function as TDO, TCK, TMS, TRST, and TDI, respectively.
When EMLE = 1, H-UDI function is available and the pins function as TDO, TCK, TMS, TRST, and TDI, respectively.
Figure 1.5 Pin Arrangements of HD64F2218, HD64F2218U, HD64F2218CU
and HD64F2217CU (TFP-100G, TFP-100GV)