Datasheet

Section 1 Overview
Rev.7.00 Dec. 24, 2008 Page 1 of 698
REJ09B0074-0700
Section 1 Overview
1.1 Overview
• High-speed H8S/2000 central processing unit with 16-bit architecture
⎯ Upward-compatible with H8/300 and H8/300H CPUs on an object level
⎯ Sixteen 16-bit general registers
⎯ 65 basic instructions
• Various peripheral functions
⎯ DMA controller (DMAC)
⎯ 16-bit timer-pulse unit (TPU)
⎯ Watchdog timer (WDT)
⎯ Realtime clock (RTC)
⎯ Serial communication interface (SCI)
⎯ Boundary scan
⎯ Universal serial bus (USB)
⎯ 10-bit A/D converter
⎯ High-performance user debugging interface (H-UDI)
⎯ Clock pulse generator
• On-chip memory
H8S/2218 Group
ROM Part No. ROM RAM Remarks
Flash memory Version HD64F2218 128 kbytes 12 kbytes SCI boot mode
HD64F2218U 128 kbytes 12 kbytes USB boot mode
HD64F2218CU 128 kbytes 12 kbytes USB boot mode
HD64F2217CU 64 kbytes 12 kbytes USB boot mode
Masked ROM Version HD6432217 64 kbytes 8 kbytes ⎯