Datasheet

Section 14 Universal Serial Bus (USB)
Rev.7.00 Dec. 24, 2008 Page 495 of 698
REJ09B0074-0700
Table 14.4 Interrupt Sources
Register
Bit
Transfer
Mode
Interrupt
Source
Description
Interrupt
Request
Signal
DMAC
Activation by
USB
Request*
5
UIFR0 0 Control transfer
(EP0)
SetupTS*
1
Setup command
receive complete
EXIRQ0 or
EXIRQ1
×
1 EP0iTS*
1
EP0i transfer complete EXIRQ0 or
EXIRQ1
×
2 EP0iTR*
1
EP0i transfer request EXIRQ0 or
EXIRQ1
×
3 EP0oTS*
1
EP0o receive
complete
EXIRQ0 or
EXIRQ1
×
4 Interrupt_in transfer
(EP3)
EP3TS EP3 transfer complete EXIRQ0 or
EXIRQ1
×
5 EP3TR EP3 transfer request EXIRQ0 or
EXIRQ1
×
6 — Reserved — — —
7 (Status) BRST Bus reset EXIRQ0 or
EXIRQ1
×
UIFR1 0 Bulk_in transfer
(EP1)
EP1EMPTY EP1 FIFO empty EXIRQ0 or
EXIRQ1
DREQ0 or
DREQ1*
2
1 EP1TR EP1 transfer request EXIRQ0 or
EXIRQ1
×
2 Bulk_out transfer
(EP2)
EP2READY EP2 data ready EXIRQ0 or
EXIRQ1
DREQ0 or
DREQ1*
3
3 Bulk_in transfer
(EP1)
(EP1ALLEMPTYs) EP1 FIFO all empty
status
× ×
4 — Reserved — — —
5
6
7