Datasheet

Section 14 Universal Serial Bus (USB)
Rev.7.00 Dec. 24, 2008 Page 480 of 698
REJ09B0074-0700
14.3.16 USB Interrupt Flag Register 0 (UIFR0)
UIFR0 is an interrupt flag register indicating the setup command reception, EP0 and EP3
transmission/reception, and bus reset state. If the corresponding bit is set to 1, the corresponding
EXIRQ0 or EXIRQ1 interrupt is requested to the CPU. A bit in this register can be cleared by
writing 0 to it. Writing 1 to a bit is invalid and causes no operation. Consequently, to clear a flag,
write 0 to the corresponding bit and 1 to all the other bits. (For example, write H'DF to clear bit 5.)
The bit-clear instruction is a read/modify/write instruction, so if a new flag is set between the read
and write operations, there is a danger that it may be cleared erroneously. Therefore, do not use the
bit-clear instruction to clear bits in this interrupt flag resister.