Datasheet

Section 12 Serial Communication Interface
Rev.7.00 Dec. 24, 2008 Page 407 of 698
REJ09B0074-0700
12.4.4 SCI Initialization (Asynchronous Mode)
Before transmitting and receiving data, you should first clear the TE and RE bits in SCR to 0, then
initialize the SCI as described in a sample flowchart in figure 12.8. When the operating mode, or
transfer format, is changed for example, the TE and RE bits must be cleared to 0 before making the
change using the following procedure. When the TE bit is cleared to 0, the TDRE flag is set to 1.
Note that clearing the RE bit to 0 does not initialize the contents of the RDRF, PER, FER, and
ORER flags, or the contents of RDR. When the external clock is used in asynchronous mode, the
clock must be supplied even during initialization.
Wait
<Initialization completion>
Start initialization
Set data transfer format in
SMR, SCMR, and SEMRA_0
[1]
Set CKE1 and CKE0 bits in SCR
(TE, RE bits 0)
No
Yes
Set value in BRR
Clear TE and RE bits in SCR to 0
[2]
[3]
Set TE and RE* bits in
SCR to 1, and set RIE, TIE, TEIE,
and MPIE bits
Note: * Perform this set operation with the RxD pin in the 1 state. If the RE bit is set to 1 with the RxD pin
in the 0 state, it may be misinterpreted as a start bit.
[4]
1-bit interval elapsed?
[1] Set the clock selection in SCR.
Be sure to clear bits RIE, TIE, TEIE, and
MPIE, and bits TE and RE, to 0.
When the clock is selected in
asynchronous mode, it is output
immediately after SCR settings are
made.
[2] Set the data transfer format in SMR,
SCMR, and SEMRA_0.
[3] Write a value corresponding to the bit
rate to BRR. Not necessary if an
external clock or average transfer rate
clock by ACS2 to ACS0 is used.
[4] Wait at least one bit interval, then set the
TE bit or RE bit in SCR to 1. Also set
the RIE, TIE, TEIE, and MPIE bits.
Setting the TE and RE bits enables use
of the TxD and RxD pins.
Figure 12.8 Sample SCI Initialization Flowchart