Datasheet

Section 12 Serial Communication Interface
Rev.7.00 Dec. 24, 2008 Page 400 of 698
REJ09B0074-0700
Table 12.5 Maximum Bit Rate with External Clock Input (Asynchronous Mode)
Maximum Bit Rate
(kbps)
Maximum Bit Rate
(kbps)
φ (MHz)
External
Input
Clock
(MHz)
ABCS = 0 ABCS = 1 φ (MHz)
External
Input
Clock
(MHz)
ABCS = 0 ABCS = 1
2 0.5000 31.25 62.5 9.8304 2.4576 153.6 307.2
2.097152 0.5243 327.68 65.536 10 2.5000 156.25 312.5
2.4576 0.6144 38.4 76.8 12 3.0000 187.5 375.0
3 0.7500 46.875 93.75 12.288 3.0720 192.0 384.0
3.6864 0.9216 57.6 115.2 14 3.5000 218.75 437.0
4 1.0000 62.5 125.0 14.7456 3.6864 230.4 460.8
4.9152 1.2288 76.8 153.6 16 4.0000 250.0 500.0
5 1.2500 78.125 156.25 17.2032 4.3008 268.8 537.6
6 1.5000 93.75 187.5 18 4.5000 281.25 562.5
6.144 1.5360 96.0 192.0 19.6608 4.9152 307.2 614.4
7.3728 1.8432 115.2 230.4 20 5.0000 312.5 625.0
8 2.0000 125.0 250.0 24 6.0000 375.0 750.0
Note: In this LSI, operating frequency φ must be 6 MHz or greater.