Datasheet

Section 11 Realtime Clock (RTC)
Rev.7.00 Dec. 24, 2008 Page 361 of 698
REJ09B0074-0700
Write 0 to bit 5 in ISR register
Set RTC register
Write 1 to bit 5 in IER
RUN in RTCCR1 = 1
Set IRQ5SCB = 0 and
IRQ5SCA = 1 in
ISCRH register
Read ISR register
Set the falling edge of IRQ
5
IRQ5 is enabled
Clear the IRQ5F flag
Figure 11.5 Initializing Procedure in Using RTC Interrupt
Write 0 to bit 5 in ISR register
Interrupt handling
RTE
Read ISR register
Clear the IRQ5F flag
Figure 11.6 Example of RTC Interrupt Handling Routine
11.6 Operating State in Each Mode
Table 11.3 shows the operating state in each mode when the RTC is set for clock operation and
free running timer operation. The clock operation is performed continuously even in low power
mode. Therefore, when the clock operation is unnecessary, cancel it by EXMDLSTP.