Datasheet

Section 9 16-Bit Timer Pulse Unit (TPU)
Rev.7.00 Dec. 24, 2008 Page 322 of 698
REJ09B0074-0700
9.6 Interrupts
9.6.1 Interrupt Source and Priority
There are three kinds of TPU interrupt source: TGR input capture/compare match, TCNT
overflow, and TCNT underflow. Each interrupt source has its own status flag and enable/disabled
bit, allowing generation of interrupt request signals to be enabled or disabled individually. When
an interrupt request is generated, the corresponding status flag in TSR is set to 1. If the
corresponding enable/disable bit in TIER is set to 1 at this time, an interrupt is requested. The
interrupt request is cleared by clearing the status flag to 0. Relative channel priorities can be
changed by the interrupt controller, but the priority order within a channel is fixed. For details, see
section 5, Interrupt Controller. Table 9.24 lists the TPU interrupt sources.
Table 9.24 TPU Interrupts
Channel Name Interrupt Source Interrupt Flag DMAC Activation Priority*
TGI0A TGRA_0 input
capture/compare match
TGFA Possible High
TGI0B TGRB_0 input
capture/compare match
TGFB Not possible
TGI0C TGRC_0 input
capture/compare match
TGFC Not possible
TGI0D TGRD_0 input
capture/compare match
TGFD Not possible
0
TCI0V TCNT_0 overflow TCFV Not possible
TGI1A TGRA_1 input
capture/compare match
TGFA Possible
TGI1B TGRB_1 input
capture/compare match
TGFB Not possible
TCI1V TCNT_1 overflow TCFV Not possible
1
TCI1U TCNT_1 underflow TCFU Not possible
2 TGI2A TGRA_2 input
capture/compare match
TGFA Possible
TGI2B TGRB_2 input
capture/compare match
TGFB Not possible
TCI2V TCNT_2 overflow TCFV Not possible
TCI2U TCNT_2 underflow TCFU Not possible Low
Note: * This table shows the initial state immediately after a reset. The relative channel priorities
can be changed by the interrupt controller.