Datasheet

Section 8 I/O Ports
Rev.7.00 Dec. 24, 2008 Page 269 of 698
REJ09B0074-0700
8.12.2 Port G Data Register (PGDR)
PGDR stores output data for the port G pins.
Bit Bit Name Initial Value R/W Description
7 to
5
⎯ Undefined ⎯ Reserved
These bits are undefined and cannot be modified.
4
3
2
1
0
PG4DR*
1
PG3DR*
1
PG2DR*
1
PG1DR
PG0DR*
2
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Store output data for a pin that functions as a general
output port.
Notes: 1. Reserved in the H8S/2212 Group. If this bit is read, an undefined value will be read.
This bit cannot be modified.
2. Reserved in the H8S/2218 Group. If this bit is read, an undefined value will be read.
This bit cannot be modified.
8.12.3 Port G Register (PORTG)
PORTG indicates the pin states of the port G.
Bit Bit Name Initial Value R/W Description
7 to
5
⎯ Undefined ⎯ Reserved
These bits are undefined.
4
3
2
1
0
PG4*
2
PG3*
2
PG2*
2
PG1
PG0*
3
⎯*
1
⎯*
1
⎯*
1
⎯*
1
⎯*
1
R
R
R
R
R
If the port G is read while PGDDR bits are set to 1, the
PGDR value is read. If the port G is read while PGDDR
bits are cleared to 0, the pin states are read.
Notes: 1. Determined by the states of pins PG4 to PG0.
2. Reserved in the H8S/2212 Group. If this bit is read, an undefined value will be read.
3. Reserved in the H8S/2218 Group. If this bit is read, an undefined value will be read.