Datasheet

Section 8 I/O Ports
Rev.7.00 Dec. 24, 2008 Page 256 of 698
REJ09B0074-0700
8.10.2 Port E Data Register (PEDR)
PEDR stores output data for the port E pins.
Bit Bit Name Initial Value R/W Description
7
6
5
4
3
2
1
0
PE7DR
PE6DR
PE5DR
PE4DR
PE3DR
PE2DR
PE1DR
PE0DR
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Store output data for a pin that functions as a general
output port.
8.10.3 Port E Register (PORTE)
PORTE indicates the pin states of the port E.
Bit Bit Name Initial Value R/W Description
7
6
5
4
3
2
1
0
PE7
PE6
PE5
PE4
PE3
PE2
PE1
PE0
⎯*
⎯*
⎯*
⎯*
⎯*
⎯*
⎯*
⎯*
R
R
R
R
R
R
R
R
If the port E is read while PEDDR bits are set to 1, the
PEDR value is read. If the port E is read while PEDDR
bits are cleared to 0, the pin states are read.
Note: * Determined by the states of pins PE7 to PE0.