Datasheet

Section 8 I/O Ports
Rev.7.00 Dec. 24, 2008 Page 228 of 698
REJ09B0074-0700
8.4 Port 7
In the H8S/2218 Group, the port 7 is a 3-bit I/O port also functioning as bus control output pins
and manual reset input pins. In the H8S/2212 Group, the port 7 is a 3-bit I/O port also functioning
as H-UDI pins. The port 7 has the following registers.
• Port 7 data direction register (P7DDR)
• Port 7 data register (P7DR)
• Port 7 register (PORT7)
8.4.1 Port 7 Data Direction Register (P7DDR)
P7DDR specifies input or output for the pins of the port 7.
Since P7DDR is a write-only register, the bit manipulation instructions must not be used to write
P7DDR. For details, see section 2.9.4, Accessing Registers Containing Write-Only Bits.
Bit Bit Name Initial Value R/W Description
7
6
5
P77DDR
P76DDR
P75DDR
0
0
0
W
W
W
(H8S/2218 Group)
Reserved
These bits are undefined and cannot be modified.
(H8S/2212 Group)
When EMLE = 1: Pins P77 to P75 function as the H-UDI
pins (TDO, TMS, TCK).
When EMLE = 0: If a P7DDR bit is set to 1, pins P77 to
P75 function as output ports. If a P7DDR bit is cleared to
0, pins P77 to P75 function as input ports.
4 P74DDR 0 W (H8S/2218 Group)
Setting a P7DDR bit to 1 makes the corresponding port 7
pin an output pin, while clearing the bit to 0 makes the pin
an input pin.
(H8S/2212 Group)
Reserved
This bit is undefined and cannot be modified.
3, 2 ⎯ Undefined ⎯ Reserved
These bits are undefined and cannot be modified.