Datasheet

Section 6 Bus Controller
Rev.7.00 Dec. 24, 2008 Page 146 of 698
REJ09B0074-0700
Figure 6.19 shows an example of wait state insertion timing.
In the H8S/2212 Group, the WAITE bit in BCRH should not be set to 1.
By program
wait
T
1
Address bus
φ
AS
RD
Data bus
Read data
Read
HWR, LWR
Write data
Write
Note: ↓ indicates the timing of WAIT pin sampling.
WAIT
Data bus
T
2
T
w
T
w
T
w
T
3
By WAIT pin
Figure 6.19 Example of Wait State Insertion Timing