Datasheet

Section 6 Bus Controller
Rev.7.00 Dec. 24, 2008 Page 118 of 698
REJ09B0074-0700
6.3 Register Descriptions
The following shows the registers of the bus controller.
• Bus width control register (ABWCR)
• Access state control register (ASTCR)
• Wait control register H (WCRH)
• Wait control register L (WCRL)
• Bus control register H (BCRH)
• Bus control register L (BCRL )
• Pin function control register (PFCR)
6.3.1 Bus Width Control Register (ABWCR)
ABWCR designates each area for either 8-bit access or 16-bit access.
ABWCR sets the data bus width for the external memory space. The bus width for on-chip
memory and internal I/O registers except for the on-chip USB and RTC is fixed regardless of the
settings in ABWCR.
Bit Bit Name Initial Value R/W Description
7
6
5
4
3
2
1
0
ABW7*
2
ABW6*
2
ABW5
ABW4
ABW3
ABW2
ABW1
ABW0
1/0*
1
1/0*
1
1/0*
1
1/0*
1
1/0*
1
1/0*
1
1/0*
1
1/0*
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Area 7 to 0 Bus Width Control:
These bits select whether the corresponding area is to
be designated for 8-bit access or 16-bit access.
0: Area n is designated for 16-bit access
1: Area n is designated for 8-bit access
Legend: n = 7 to 0
Notes: 1. In modes 5 to 7, initial value of each bit is 1. In mode 4, initial value of each bit is 0.
These bits should be set to 1 in the H8S/2212 Group.
2. The on-chip USB and on-chip RTC are allocated to area 6 and area 7, respectively.
Therefore, these bits should be set to 1.