Datasheet

Section 6 Bus Controller
Rev.7.00 Dec. 24, 2008 Page 117 of 698
REJ09B0074-0700
6.2 Input/Output Pins
Table 6.1 summarizes the pins of the bus controller.
These pins are supported only by the H8S/2218 Group.
Table 6.1 Pin Configuration
Name Symbol I/O Function
Address strove AS Output Strobe signal indicating that address output on
address bus is enabled.
Read RD Output Strobe signal indicating that external space is being
read.
High write HWR Output Strobe signal indicating that external space is to be
written, and upper half (D15 to D8) of data bus is
enabled.
Low write LWR Output Strobe signal indicating that external space is to be
written, and lower half (D7 to D0) of data bus is
enabled.
Chip select 0 to 5 CS0 to CS5 Output Strobe signal indicating that areas 0 to 5 are selected.
Wait WAIT Input Wait request signal when accessing external 3-state
access space.
Bus request BREQ Input Request signal that releases bus to external device.
Bus request
acknowledge
BACK Output Acknowledge signal indicating that bus has been
released.