Datasheet

Rev.7.00 Dec. 24, 2008 Page xiv of liv
REJ09B0074-0700
Item Page Revision (See Manual for Details)
12.3.11 Bit Rate
Register (BRR)
Table 12.6 BRR
Settings for Various
Bit Rates (Clocked
Synchronous Mode)
401 Table amended
Operating Frequency (MHz)
2 24
Bit Rate
(bps )
n N n n N
110 3 70
250 2 124 2
500 1 249 2
1 k 1 124 1
2.5 k 0 199 1 2 149
5 k 0 99 0 2 74
10 k 0 49 0 1 149
25 k 0 19 0 0 239
50 k 0 9 0 0 119
100 k 0 4 0 0 59
250 k 0 1 0 0 23
500 k 0 0* 0 0 11
1 M 0 0 5
2 M 0 2
2.5 M
4 M
5 M
6 M 0 0*
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12.4.2. Receive Data
Sampling Timing and
Reception Margin in
Asynchronous Mode
Figure 12.6 Receive
Data Sampling Timing
in Asynchronous Mode
405 Note added
Note: * In this example the value of the ABCS bit in SEMRA_0
is 0. When ABCS is set to 1, the basic clock frequency is eight
times the bit rate and the receive data is sampled at the fourth
rising edge of the basic clock.
Section 13 Boundary
Scan Function
449 Description amended
The HD64F2218, HD64F2218U, HD64F2218CU and
HD64F2217CU incorporate a boundary scan function, which is
a serial I/O interface based on the JTAG (Joint Test Action
Group, IEEEStd.1149.1 and IEEE Standard Test Access Port
and Boundary Scan Architecture).