Datasheet

Section 5 Interrupt Controller
Rev.7.00 Dec. 24, 2008 Page 101 of 698
REJ09B0074-0700
5.5 Interrupt Exception Handling Vector Table
Table 5.2 shows interrupt exception handling sources, vector addresses, and interrupt priorities.
For default priorities, the lower the vector number, the higher the priority. Priorities among
modules can be set by means of the IPR. Modules set at the same priority will conform to their
default priorities. Priorities within a module are fixed.
Table 5.2 Interrupt Sources, Vector Addresses, and Interrupt Priorities
Vector Address*
Interrupt
Source
Origin of Interrupt
Source
Vector
Number
Advanced Mode IPR Priority
External pins NMI 7 H'001C High
IRQ0 16 H'0040 IPRA6 to IPRA4
IRQ1 17 H'0044 IPRA2 to IPRA0
IRQ2 18 H'0048 IPRB6 to IPRB4
IRQ3 19 H'004C
IRQ4 20 H'0050 IPRB2 to IPRB0
RTC IRQ5 21 H'0054
USB IRQ6 22 H'0058 IPRC6 to IPRC4
External pins IRQ7 23 H'005C
Watchdog Timer WOVI 25 H'0064 IPRD6 to IPRD4
A/D ADI 28 H'0070 IPRE2 to IPRE0
TGI0A 32 H'0080
TGI0B 33 H'0084
TGI0C 34 H'0088
TGI0D 35 H'008C
TPU channel 0
TGI0V 36 H'0090
IPRF6 to IPRF4
TPU channel 1 TGI1A 40 H'00A0 IPRF2 to IPRF0
TGI1B 41 H'00A4
TGI1V 42 H'00A8
TGI1U 43 H'00AC Low