Datasheet

Section 5 Interrupt Controller
Rev.7.00 Dec. 24, 2008 Page 92 of 698
REJ09B0074-0700
A block diagram of the interrupt controller is shown in figure 5.1.
SYSCR
NMI input
IRQ input
Internal interrupt
request
WOVI to EXIRQ1
INTM1, INTM0
NMIEG
NMI input unit
IRQ input unit
ISR
ISCR IER
IPR
Interrupt controller
Priority
determination
Interrupt
request
Vector number
I
I2 to I0
CCR
EXR
CPU
ISCR:
IER:
ISR:
IPR:
SYSCR:
IRQ sense control register
IRQ enable register
IRQ status register
Interrupt priority register
System control register
Legend:
Figure 5.1 Block Diagram of Interrupt Controller