Datasheet

Section 4 Exception Handling
Rev.7.00 Dec. 24, 2008 Page 85 of 698
REJ09B0074-0700
(1) (3)
(2) (4)
(5)
(6)
Note: * Three program wait states are inserted.
Reset exception handling vector address (for power-on reset, (1) = H'000000,
(3) = H'000002; for manual reset, (1) = H'000004, (3) = H'000006)
Start address (contents of reset exception handling vector address)
Start address ((5) = (2) (4))
First program instruction
φ
RES, MRES
Address bus
RD
HWR, LWR
D15 to D0
(1) (3)
High
(2) (4)
(5)
(6)
* * *
Vector fetch
Internal
processing
Prefetch of first
program instruction
Figure 4.1 Reset Sequence (Mode 4)